1. Channel type
The first step in selecting a good field-effect transistor device is to decide whether to use an N-channel or P-channel field-effect transistor. In a typical power application, when a field-effect transistor is grounded and the load is connected to the trunk voltage, the field-effect transistor constitutes a low-voltage side switch. In a low-voltage side switch, an N-channel field-effect transistor should be used, due to considerations of the voltage required to turn the device off or on. When the field effect transistor is connected to the bus and load ground, a high voltage side switch should be used. P-channel field effect transistors are usually used in this topology, which is also due to the consideration of voltage drive.
2. Voltage rating
Determine the required voltage rating, or the maximum voltage that the device can withstand. The larger the rated voltage, the higher the cost of the device. According to practical experience, the rated voltage should be greater than the trunk line voltage or bus voltage. This will provide sufficient protection so that the FETs will not fail.
In terms of selecting a FET, it is important to determine the maximum voltage that can be withstood from drain to source, i.e., the maximum VDS. It is important to know that the maximum voltage that a FET can withstand varies with temperature. We must test the range of voltage variation over the entire operating temperature range. The rated voltage must have enough margin to cover this range of variation to ensure that the circuit does not fail. Other safety factors to consider include voltage transients induced by switching electronics (such as motors or transformers). The rated voltage varies from application to application; typically, 20V for portable devices, 20 to 30V for FPGA power supplies, and 450 to 600V for 85 to 220VAC applications.
3. Rated current
The rated current should be the maximum current that the load can withstand in all cases. Similar to the case of voltage, ensure that the selected field-effect transistor can withstand this rated current, even when the system generates spike currents. The two current cases considered are continuous mode and pulse spikes. In continuous conduction mode, the field effect transistor is in steady state, when current is continuously passing through the device. A pulse spike is when there is a large inrush (or spike current) flowing through the device. Once the maximum current under these conditions is determined, it is only necessary to directly select the device that can withstand this maximum current.
4. Conduction loss
In practice, the field effect transistor is not the ideal device, because there will be electrical energy loss in the conductive process, which is called conduction loss. Field effect transistor in the "on" like a variable resistance, by the device's RDS (ON) is determined, and with the temperature and significant changes. The power dissipation of the device can be calculated by Iload2×RDS (ON), and since the on-resistance varies with temperature, the power dissipation will also vary proportionally. The higher the voltage VGS applied to the field effect transistor, the smaller the RDS (ON) will be; conversely the higher the RDS (ON) will be. Note that the RDS (ON) resistance will rise slightly with current. Various electrical parameter variations on the RDS (ON) resistance can be found in the technical data sheet provided by the manufacturer.
5. System heat dissipation
Two different scenarios must be considered, namely the worst case and the real case. It is recommended that the worst-case calculation be used, as it provides a greater margin of safety and ensures that the system will not fail. There are also some measurements to note on the FET data sheet; the junction temperature of the device is equal to the maximum ambient temperature plus the product of the thermal resistance and power dissipation (junction temperature = maximum ambient temperature + [thermal resistance x power dissipation]). According to this equation the maximum power dissipation of the system can be solved, which is by definition equal to I2 × RDS (ON). We already want to pass the maximum current of the device, you can calculate the RDS (ON) at different temperatures. In addition, the board and its field-effect transistor heat dissipation should be done.
Avalanche breakdown is when the reverse voltage on a semiconductor device exceeds the maximum value and a strong electric field is formed to increase the current in the device. An increase in wafer size will improve avalanche resistance and ultimately improve the robustness of the device. Therefore, choosing a larger package can effectively prevent avalanche.
6. Switching performance
There are many parameters that affect switching performance, but the most important ones are gate/drain, gate/source and drain/source capacitance. These capacitances generate switching losses in the device because they have to be charged at each switch. The switching speed of the field-effect transistor is thus reduced and the device efficiency decreases. To calculate the total device loss during switching, the loss during turn-on (Eon) and the loss during turn-off (Eoff) are calculated. The total power of the FET switch can be expressed by the following equation: Psw=(Eon+Eoff)×switching frequency. And the gate charge (Qgd) has the greatest effect on the switching performance.
